| 1 | /* SPDX-License-Identifier: GPL-2.0 |
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| 2 | * |
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| 3 | * Copyright 2016-2018 HabanaLabs, Ltd. |
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| 4 | * All Rights Reserved. |
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| 5 | * |
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| 6 | */ |
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| 7 | |
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| 8 | /************************************ |
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| 9 | ** This is an auto-generated file ** |
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| 10 | ** DO NOT EDIT BELOW ** |
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| 11 | ************************************/ |
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| 12 | |
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| 13 | #ifndef ASIC_REG_SIF_RTR_CTRL_7_REGS_H_ |
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| 14 | #define ASIC_REG_SIF_RTR_CTRL_7_REGS_H_ |
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| 15 | |
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| 16 | /* |
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| 17 | ***************************************** |
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| 18 | * SIF_RTR_CTRL_7 (Prototype: RTR_CTRL) |
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| 19 | ***************************************** |
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| 20 | */ |
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| 21 | |
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| 22 | #define mmSIF_RTR_CTRL_7_PERM_SEL 0x376108 |
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| 23 | |
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| 24 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_0 0x376114 |
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| 25 | |
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| 26 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_1 0x376118 |
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| 27 | |
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| 28 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_2 0x37611C |
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| 29 | |
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| 30 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_3 0x376120 |
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| 31 | |
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| 32 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_4 0x376124 |
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| 33 | |
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| 34 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_5 0x376128 |
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| 35 | |
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| 36 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_6 0x37612C |
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| 37 | |
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| 38 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_7 0x376130 |
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| 39 | |
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| 40 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_8 0x376134 |
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| 41 | |
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| 42 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_9 0x376138 |
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| 43 | |
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| 44 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_10 0x37613C |
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| 45 | |
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| 46 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_11 0x376140 |
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| 47 | |
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| 48 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_12 0x376144 |
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| 49 | |
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| 50 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_13 0x376148 |
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| 51 | |
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| 52 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_14 0x37614C |
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| 53 | |
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| 54 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_15 0x376150 |
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| 55 | |
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| 56 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_16 0x376154 |
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| 57 | |
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| 58 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_17 0x376158 |
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| 59 | |
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| 60 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_18 0x37615C |
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| 61 | |
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| 62 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_19 0x376160 |
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| 63 | |
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| 64 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_20 0x376164 |
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| 65 | |
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| 66 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_21 0x376168 |
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| 67 | |
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| 68 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_22 0x37616C |
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| 69 | |
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| 70 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_23 0x376170 |
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| 71 | |
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| 72 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_24 0x376174 |
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| 73 | |
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| 74 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_25 0x376178 |
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| 75 | |
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| 76 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_26 0x37617C |
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| 77 | |
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| 78 | #define mmSIF_RTR_CTRL_7_HBM_POLY_H3_27 0x376180 |
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| 79 | |
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| 80 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_0 0x376184 |
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| 81 | |
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| 82 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_1 0x376188 |
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| 83 | |
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| 84 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_2 0x37618C |
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| 85 | |
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| 86 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_3 0x376190 |
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| 87 | |
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| 88 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_4 0x376194 |
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| 89 | |
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| 90 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_5 0x376198 |
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| 91 | |
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| 92 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_6 0x37619C |
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| 93 | |
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| 94 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_7 0x3761A0 |
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| 95 | |
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| 96 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_8 0x3761A4 |
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| 97 | |
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| 98 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_9 0x3761A8 |
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| 99 | |
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| 100 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_10 0x3761AC |
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| 101 | |
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| 102 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_11 0x3761B0 |
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| 103 | |
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| 104 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_12 0x3761B4 |
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| 105 | |
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| 106 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_13 0x3761B8 |
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| 107 | |
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| 108 | #define mmSIF_RTR_CTRL_7_SRAM_POLY_H3_14 0x3761BC |
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| 109 | |
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| 110 | #define mmSIF_RTR_CTRL_7_SCRAM_SRAM_EN 0x37626C |
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| 111 | |
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| 112 | #define mmSIF_RTR_CTRL_7_RL_HBM_EN 0x376274 |
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| 113 | |
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| 114 | #define mmSIF_RTR_CTRL_7_RL_HBM_SAT 0x376278 |
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| 115 | |
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| 116 | #define mmSIF_RTR_CTRL_7_RL_HBM_RST 0x37627C |
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| 117 | |
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| 118 | #define mmSIF_RTR_CTRL_7_RL_HBM_TIMEOUT 0x376280 |
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| 119 | |
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| 120 | #define mmSIF_RTR_CTRL_7_SCRAM_HBM_EN 0x376284 |
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| 121 | |
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| 122 | #define mmSIF_RTR_CTRL_7_RL_PCI_EN 0x376288 |
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| 123 | |
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| 124 | #define mmSIF_RTR_CTRL_7_RL_PCI_SAT 0x37628C |
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| 125 | |
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| 126 | #define mmSIF_RTR_CTRL_7_RL_PCI_RST 0x376290 |
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| 127 | |
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| 128 | #define mmSIF_RTR_CTRL_7_RL_PCI_TIMEOUT 0x376294 |
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| 129 | |
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| 130 | #define mmSIF_RTR_CTRL_7_RL_SRAM_EN 0x37629C |
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| 131 | |
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| 132 | #define mmSIF_RTR_CTRL_7_RL_SRAM_SAT 0x3762A0 |
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| 133 | |
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| 134 | #define mmSIF_RTR_CTRL_7_RL_SRAM_RST 0x3762A4 |
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| 135 | |
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| 136 | #define mmSIF_RTR_CTRL_7_RL_SRAM_TIMEOUT 0x3762AC |
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| 137 | |
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| 138 | #define mmSIF_RTR_CTRL_7_RL_SRAM_RED 0x3762B4 |
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| 139 | |
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| 140 | #define mmSIF_RTR_CTRL_7_E2E_HBM_EN 0x3762EC |
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| 141 | |
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| 142 | #define mmSIF_RTR_CTRL_7_E2E_PCI_EN 0x3762F0 |
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| 143 | |
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| 144 | #define mmSIF_RTR_CTRL_7_E2E_HBM_WR_SIZE 0x3762F4 |
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| 145 | |
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| 146 | #define mmSIF_RTR_CTRL_7_E2E_PCI_WR_SIZE 0x3762F8 |
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| 147 | |
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| 148 | #define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_SET_EN 0x376404 |
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| 149 | |
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| 150 | #define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_SET 0x376408 |
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| 151 | |
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| 152 | #define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_WRAP 0x37640C |
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| 153 | |
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| 154 | #define mmSIF_RTR_CTRL_7_E2E_AW_PCI_CTR_CNT 0x376410 |
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| 155 | |
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| 156 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM_CTR_SET_EN 0x376414 |
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| 157 | |
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| 158 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM_CTR_SET 0x376418 |
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| 159 | |
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| 160 | #define mmSIF_RTR_CTRL_7_E2E_HBM_RD_SIZE 0x37641C |
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| 161 | |
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| 162 | #define mmSIF_RTR_CTRL_7_E2E_PCI_RD_SIZE 0x376420 |
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| 163 | |
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| 164 | #define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_SET_EN 0x376424 |
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| 165 | |
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| 166 | #define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_SET 0x376428 |
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| 167 | |
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| 168 | #define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_WRAP 0x37642C |
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| 169 | |
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| 170 | #define mmSIF_RTR_CTRL_7_E2E_AR_PCI_CTR_CNT 0x376430 |
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| 171 | |
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| 172 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM_CTR_SET_EN 0x376434 |
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| 173 | |
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| 174 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM_CTR_SET 0x376438 |
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| 175 | |
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| 176 | #define mmSIF_RTR_CTRL_7_NL_HBM_SEL_0 0x376450 |
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| 177 | |
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| 178 | #define mmSIF_RTR_CTRL_7_NL_HBM_SEL_1 0x376454 |
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| 179 | |
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| 180 | #define mmSIF_RTR_CTRL_7_NON_LIN_EN 0x376480 |
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| 181 | |
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| 182 | #define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_0 0x376500 |
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| 183 | |
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| 184 | #define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_1 0x376504 |
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| 185 | |
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| 186 | #define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_2 0x376508 |
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| 187 | |
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| 188 | #define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_3 0x37650C |
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| 189 | |
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| 190 | #define mmSIF_RTR_CTRL_7_NL_SRAM_BANK_4 0x376510 |
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| 191 | |
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| 192 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_0 0x376514 |
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| 193 | |
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| 194 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_1 0x376520 |
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| 195 | |
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| 196 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_2 0x376524 |
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| 197 | |
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| 198 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_3 0x376528 |
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| 199 | |
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| 200 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_4 0x37652C |
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| 201 | |
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| 202 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_5 0x376530 |
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| 203 | |
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| 204 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_6 0x376534 |
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| 205 | |
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| 206 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_7 0x376538 |
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| 207 | |
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| 208 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_8 0x37653C |
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| 209 | |
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| 210 | #define mmSIF_RTR_CTRL_7_NL_SRAM_OFFSET_9 0x376540 |
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| 211 | |
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| 212 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_0 0x376550 |
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| 213 | |
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| 214 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_1 0x376554 |
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| 215 | |
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| 216 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_2 0x376558 |
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| 217 | |
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| 218 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_3 0x37655C |
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| 219 | |
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| 220 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_4 0x376560 |
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| 221 | |
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| 222 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_5 0x376564 |
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| 223 | |
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| 224 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_6 0x376568 |
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| 225 | |
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| 226 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_7 0x37656C |
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| 227 | |
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| 228 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_8 0x376570 |
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| 229 | |
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| 230 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_9 0x376574 |
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| 231 | |
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| 232 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_10 0x376578 |
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| 233 | |
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| 234 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_11 0x37657C |
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| 235 | |
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| 236 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_12 0x376580 |
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| 237 | |
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| 238 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_13 0x376584 |
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| 239 | |
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| 240 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_14 0x376588 |
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| 241 | |
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| 242 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_15 0x37658C |
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| 243 | |
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| 244 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_16 0x376590 |
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| 245 | |
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| 246 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_17 0x376594 |
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| 247 | |
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| 248 | #define mmSIF_RTR_CTRL_7_NL_HBM_OFFSET_18 0x376598 |
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| 249 | |
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| 250 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_0 0x3765E4 |
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| 251 | |
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| 252 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_1 0x3765E8 |
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| 253 | |
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| 254 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_2 0x3765EC |
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| 255 | |
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| 256 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_3 0x3765F0 |
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| 257 | |
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| 258 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_4 0x3765F4 |
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| 259 | |
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| 260 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_5 0x3765F8 |
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| 261 | |
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| 262 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_6 0x3765FC |
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| 263 | |
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| 264 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_7 0x376600 |
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| 265 | |
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| 266 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_8 0x376604 |
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| 267 | |
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| 268 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_9 0x376608 |
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| 269 | |
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| 270 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_10 0x37660C |
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| 271 | |
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| 272 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_11 0x376610 |
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| 273 | |
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| 274 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_12 0x376614 |
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| 275 | |
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| 276 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_13 0x376618 |
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| 277 | |
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| 278 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_14 0x37661C |
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| 279 | |
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| 280 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AW_15 0x376620 |
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| 281 | |
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| 282 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_0 0x376624 |
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| 283 | |
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| 284 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_1 0x376628 |
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| 285 | |
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| 286 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_2 0x37662C |
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| 287 | |
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| 288 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_3 0x376630 |
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| 289 | |
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| 290 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_4 0x376634 |
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| 291 | |
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| 292 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_5 0x376638 |
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| 293 | |
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| 294 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_6 0x37663C |
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| 295 | |
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| 296 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_7 0x376640 |
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| 297 | |
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| 298 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_8 0x376644 |
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| 299 | |
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| 300 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_9 0x376648 |
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| 301 | |
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| 302 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_10 0x37664C |
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| 303 | |
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| 304 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_11 0x376650 |
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| 305 | |
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| 306 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_12 0x376654 |
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| 307 | |
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| 308 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_13 0x376658 |
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| 309 | |
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| 310 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_14 0x37665C |
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| 311 | |
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| 312 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AW_15 0x376660 |
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| 313 | |
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| 314 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_0 0x376664 |
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| 315 | |
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| 316 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_1 0x376668 |
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| 317 | |
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| 318 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_2 0x37666C |
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| 319 | |
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| 320 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_3 0x376670 |
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| 321 | |
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| 322 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_4 0x376674 |
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| 323 | |
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| 324 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_5 0x376678 |
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| 325 | |
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| 326 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_6 0x37667C |
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| 327 | |
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| 328 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_7 0x376680 |
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| 329 | |
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| 330 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_8 0x376684 |
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| 331 | |
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| 332 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_9 0x376688 |
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| 333 | |
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| 334 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_10 0x37668C |
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| 335 | |
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| 336 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_11 0x376690 |
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| 337 | |
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| 338 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_12 0x376694 |
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| 339 | |
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| 340 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_13 0x376698 |
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| 341 | |
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| 342 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_14 0x37669C |
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| 343 | |
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| 344 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AW_15 0x3766A0 |
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| 345 | |
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| 346 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_0 0x3766A4 |
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| 347 | |
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| 348 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_1 0x3766A8 |
|---|
| 349 | |
|---|
| 350 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_2 0x3766AC |
|---|
| 351 | |
|---|
| 352 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_3 0x3766B0 |
|---|
| 353 | |
|---|
| 354 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_4 0x3766B4 |
|---|
| 355 | |
|---|
| 356 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_5 0x3766B8 |
|---|
| 357 | |
|---|
| 358 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_6 0x3766BC |
|---|
| 359 | |
|---|
| 360 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_7 0x3766C0 |
|---|
| 361 | |
|---|
| 362 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_8 0x3766C4 |
|---|
| 363 | |
|---|
| 364 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_9 0x3766C8 |
|---|
| 365 | |
|---|
| 366 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_10 0x3766CC |
|---|
| 367 | |
|---|
| 368 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_11 0x3766D0 |
|---|
| 369 | |
|---|
| 370 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_12 0x3766D4 |
|---|
| 371 | |
|---|
| 372 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_13 0x3766D8 |
|---|
| 373 | |
|---|
| 374 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_14 0x3766DC |
|---|
| 375 | |
|---|
| 376 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AW_15 0x3766E0 |
|---|
| 377 | |
|---|
| 378 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_0 0x3766E4 |
|---|
| 379 | |
|---|
| 380 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_1 0x3766E8 |
|---|
| 381 | |
|---|
| 382 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_2 0x3766EC |
|---|
| 383 | |
|---|
| 384 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_3 0x3766F0 |
|---|
| 385 | |
|---|
| 386 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_4 0x3766F4 |
|---|
| 387 | |
|---|
| 388 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_5 0x3766F8 |
|---|
| 389 | |
|---|
| 390 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_6 0x3766FC |
|---|
| 391 | |
|---|
| 392 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_7 0x376700 |
|---|
| 393 | |
|---|
| 394 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_8 0x376704 |
|---|
| 395 | |
|---|
| 396 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_9 0x376708 |
|---|
| 397 | |
|---|
| 398 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_10 0x37670C |
|---|
| 399 | |
|---|
| 400 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_11 0x376710 |
|---|
| 401 | |
|---|
| 402 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_12 0x376714 |
|---|
| 403 | |
|---|
| 404 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_13 0x376718 |
|---|
| 405 | |
|---|
| 406 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_14 0x37671C |
|---|
| 407 | |
|---|
| 408 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AW_15 0x376720 |
|---|
| 409 | |
|---|
| 410 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_0 0x376724 |
|---|
| 411 | |
|---|
| 412 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_1 0x376728 |
|---|
| 413 | |
|---|
| 414 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_2 0x37672C |
|---|
| 415 | |
|---|
| 416 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_3 0x376730 |
|---|
| 417 | |
|---|
| 418 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_4 0x376734 |
|---|
| 419 | |
|---|
| 420 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_5 0x376738 |
|---|
| 421 | |
|---|
| 422 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_6 0x37673C |
|---|
| 423 | |
|---|
| 424 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_7 0x376740 |
|---|
| 425 | |
|---|
| 426 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_8 0x376744 |
|---|
| 427 | |
|---|
| 428 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_9 0x376748 |
|---|
| 429 | |
|---|
| 430 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_10 0x37674C |
|---|
| 431 | |
|---|
| 432 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_11 0x376750 |
|---|
| 433 | |
|---|
| 434 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_12 0x376754 |
|---|
| 435 | |
|---|
| 436 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_13 0x376758 |
|---|
| 437 | |
|---|
| 438 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_14 0x37675C |
|---|
| 439 | |
|---|
| 440 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AW_15 0x376760 |
|---|
| 441 | |
|---|
| 442 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_0 0x376764 |
|---|
| 443 | |
|---|
| 444 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_1 0x376768 |
|---|
| 445 | |
|---|
| 446 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_2 0x37676C |
|---|
| 447 | |
|---|
| 448 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_3 0x376770 |
|---|
| 449 | |
|---|
| 450 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_4 0x376774 |
|---|
| 451 | |
|---|
| 452 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_5 0x376778 |
|---|
| 453 | |
|---|
| 454 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_6 0x37677C |
|---|
| 455 | |
|---|
| 456 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_7 0x376780 |
|---|
| 457 | |
|---|
| 458 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_8 0x376784 |
|---|
| 459 | |
|---|
| 460 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_9 0x376788 |
|---|
| 461 | |
|---|
| 462 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_10 0x37678C |
|---|
| 463 | |
|---|
| 464 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_11 0x376790 |
|---|
| 465 | |
|---|
| 466 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_12 0x376794 |
|---|
| 467 | |
|---|
| 468 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_13 0x376798 |
|---|
| 469 | |
|---|
| 470 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_14 0x37679C |
|---|
| 471 | |
|---|
| 472 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AW_15 0x3767A0 |
|---|
| 473 | |
|---|
| 474 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_0 0x3767A4 |
|---|
| 475 | |
|---|
| 476 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_1 0x3767A8 |
|---|
| 477 | |
|---|
| 478 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_2 0x3767AC |
|---|
| 479 | |
|---|
| 480 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_3 0x3767B0 |
|---|
| 481 | |
|---|
| 482 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_4 0x3767B4 |
|---|
| 483 | |
|---|
| 484 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_5 0x3767B8 |
|---|
| 485 | |
|---|
| 486 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_6 0x3767BC |
|---|
| 487 | |
|---|
| 488 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_7 0x3767C0 |
|---|
| 489 | |
|---|
| 490 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_8 0x3767C4 |
|---|
| 491 | |
|---|
| 492 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_9 0x3767C8 |
|---|
| 493 | |
|---|
| 494 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_10 0x3767CC |
|---|
| 495 | |
|---|
| 496 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_11 0x3767D0 |
|---|
| 497 | |
|---|
| 498 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_12 0x3767D4 |
|---|
| 499 | |
|---|
| 500 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_13 0x3767D8 |
|---|
| 501 | |
|---|
| 502 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_14 0x3767DC |
|---|
| 503 | |
|---|
| 504 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AW_15 0x3767E0 |
|---|
| 505 | |
|---|
| 506 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_0 0x376824 |
|---|
| 507 | |
|---|
| 508 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_1 0x376828 |
|---|
| 509 | |
|---|
| 510 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_2 0x37682C |
|---|
| 511 | |
|---|
| 512 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_3 0x376830 |
|---|
| 513 | |
|---|
| 514 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_4 0x376834 |
|---|
| 515 | |
|---|
| 516 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_5 0x376838 |
|---|
| 517 | |
|---|
| 518 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_6 0x37683C |
|---|
| 519 | |
|---|
| 520 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_7 0x376840 |
|---|
| 521 | |
|---|
| 522 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_8 0x376844 |
|---|
| 523 | |
|---|
| 524 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_9 0x376848 |
|---|
| 525 | |
|---|
| 526 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_10 0x37684C |
|---|
| 527 | |
|---|
| 528 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_11 0x376850 |
|---|
| 529 | |
|---|
| 530 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_12 0x376854 |
|---|
| 531 | |
|---|
| 532 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_13 0x376858 |
|---|
| 533 | |
|---|
| 534 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_14 0x37685C |
|---|
| 535 | |
|---|
| 536 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_LOW_AR_15 0x376860 |
|---|
| 537 | |
|---|
| 538 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_0 0x376864 |
|---|
| 539 | |
|---|
| 540 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_1 0x376868 |
|---|
| 541 | |
|---|
| 542 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_2 0x37686C |
|---|
| 543 | |
|---|
| 544 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_3 0x376870 |
|---|
| 545 | |
|---|
| 546 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_4 0x376874 |
|---|
| 547 | |
|---|
| 548 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_5 0x376878 |
|---|
| 549 | |
|---|
| 550 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_6 0x37687C |
|---|
| 551 | |
|---|
| 552 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_7 0x376880 |
|---|
| 553 | |
|---|
| 554 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_8 0x376884 |
|---|
| 555 | |
|---|
| 556 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_9 0x376888 |
|---|
| 557 | |
|---|
| 558 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_10 0x37688C |
|---|
| 559 | |
|---|
| 560 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_11 0x376890 |
|---|
| 561 | |
|---|
| 562 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_12 0x376894 |
|---|
| 563 | |
|---|
| 564 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_13 0x376898 |
|---|
| 565 | |
|---|
| 566 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_14 0x37689C |
|---|
| 567 | |
|---|
| 568 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_BASE_HIGH_AR_15 0x3768A0 |
|---|
| 569 | |
|---|
| 570 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_0 0x3768A4 |
|---|
| 571 | |
|---|
| 572 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_1 0x3768A8 |
|---|
| 573 | |
|---|
| 574 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_2 0x3768AC |
|---|
| 575 | |
|---|
| 576 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_3 0x3768B0 |
|---|
| 577 | |
|---|
| 578 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_4 0x3768B4 |
|---|
| 579 | |
|---|
| 580 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_5 0x3768B8 |
|---|
| 581 | |
|---|
| 582 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_6 0x3768BC |
|---|
| 583 | |
|---|
| 584 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_7 0x3768C0 |
|---|
| 585 | |
|---|
| 586 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_8 0x3768C4 |
|---|
| 587 | |
|---|
| 588 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_9 0x3768C8 |
|---|
| 589 | |
|---|
| 590 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_10 0x3768CC |
|---|
| 591 | |
|---|
| 592 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_11 0x3768D0 |
|---|
| 593 | |
|---|
| 594 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_12 0x3768D4 |
|---|
| 595 | |
|---|
| 596 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_13 0x3768D8 |
|---|
| 597 | |
|---|
| 598 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_14 0x3768DC |
|---|
| 599 | |
|---|
| 600 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_LOW_AR_15 0x3768E0 |
|---|
| 601 | |
|---|
| 602 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_0 0x3768E4 |
|---|
| 603 | |
|---|
| 604 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_1 0x3768E8 |
|---|
| 605 | |
|---|
| 606 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_2 0x3768EC |
|---|
| 607 | |
|---|
| 608 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_3 0x3768F0 |
|---|
| 609 | |
|---|
| 610 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_4 0x3768F4 |
|---|
| 611 | |
|---|
| 612 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_5 0x3768F8 |
|---|
| 613 | |
|---|
| 614 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_6 0x3768FC |
|---|
| 615 | |
|---|
| 616 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_7 0x376900 |
|---|
| 617 | |
|---|
| 618 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_8 0x376904 |
|---|
| 619 | |
|---|
| 620 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_9 0x376908 |
|---|
| 621 | |
|---|
| 622 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_10 0x37690C |
|---|
| 623 | |
|---|
| 624 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_11 0x376910 |
|---|
| 625 | |
|---|
| 626 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_12 0x376914 |
|---|
| 627 | |
|---|
| 628 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_13 0x376918 |
|---|
| 629 | |
|---|
| 630 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_14 0x37691C |
|---|
| 631 | |
|---|
| 632 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_MASK_HIGH_AR_15 0x376920 |
|---|
| 633 | |
|---|
| 634 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_0 0x376924 |
|---|
| 635 | |
|---|
| 636 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_1 0x376928 |
|---|
| 637 | |
|---|
| 638 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_2 0x37692C |
|---|
| 639 | |
|---|
| 640 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_3 0x376930 |
|---|
| 641 | |
|---|
| 642 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_4 0x376934 |
|---|
| 643 | |
|---|
| 644 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_5 0x376938 |
|---|
| 645 | |
|---|
| 646 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_6 0x37693C |
|---|
| 647 | |
|---|
| 648 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_7 0x376940 |
|---|
| 649 | |
|---|
| 650 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_8 0x376944 |
|---|
| 651 | |
|---|
| 652 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_9 0x376948 |
|---|
| 653 | |
|---|
| 654 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_10 0x37694C |
|---|
| 655 | |
|---|
| 656 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_11 0x376950 |
|---|
| 657 | |
|---|
| 658 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_12 0x376954 |
|---|
| 659 | |
|---|
| 660 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_13 0x376958 |
|---|
| 661 | |
|---|
| 662 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_14 0x37695C |
|---|
| 663 | |
|---|
| 664 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_LOW_AR_15 0x376960 |
|---|
| 665 | |
|---|
| 666 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_0 0x376964 |
|---|
| 667 | |
|---|
| 668 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_1 0x376968 |
|---|
| 669 | |
|---|
| 670 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_2 0x37696C |
|---|
| 671 | |
|---|
| 672 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_3 0x376970 |
|---|
| 673 | |
|---|
| 674 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_4 0x376974 |
|---|
| 675 | |
|---|
| 676 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_5 0x376978 |
|---|
| 677 | |
|---|
| 678 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_6 0x37697C |
|---|
| 679 | |
|---|
| 680 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_7 0x376980 |
|---|
| 681 | |
|---|
| 682 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_8 0x376984 |
|---|
| 683 | |
|---|
| 684 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_9 0x376988 |
|---|
| 685 | |
|---|
| 686 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_10 0x37698C |
|---|
| 687 | |
|---|
| 688 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_11 0x376990 |
|---|
| 689 | |
|---|
| 690 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_12 0x376994 |
|---|
| 691 | |
|---|
| 692 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_13 0x376998 |
|---|
| 693 | |
|---|
| 694 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_14 0x37699C |
|---|
| 695 | |
|---|
| 696 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_BASE_HIGH_AR_15 0x3769A0 |
|---|
| 697 | |
|---|
| 698 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_0 0x3769A4 |
|---|
| 699 | |
|---|
| 700 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_1 0x3769A8 |
|---|
| 701 | |
|---|
| 702 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_2 0x3769AC |
|---|
| 703 | |
|---|
| 704 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_3 0x3769B0 |
|---|
| 705 | |
|---|
| 706 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_4 0x3769B4 |
|---|
| 707 | |
|---|
| 708 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_5 0x3769B8 |
|---|
| 709 | |
|---|
| 710 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_6 0x3769BC |
|---|
| 711 | |
|---|
| 712 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_7 0x3769C0 |
|---|
| 713 | |
|---|
| 714 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_8 0x3769C4 |
|---|
| 715 | |
|---|
| 716 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_9 0x3769C8 |
|---|
| 717 | |
|---|
| 718 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_10 0x3769CC |
|---|
| 719 | |
|---|
| 720 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_11 0x3769D0 |
|---|
| 721 | |
|---|
| 722 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_12 0x3769D4 |
|---|
| 723 | |
|---|
| 724 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_13 0x3769D8 |
|---|
| 725 | |
|---|
| 726 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_14 0x3769DC |
|---|
| 727 | |
|---|
| 728 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_LOW_AR_15 0x3769E0 |
|---|
| 729 | |
|---|
| 730 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_0 0x3769E4 |
|---|
| 731 | |
|---|
| 732 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_1 0x3769E8 |
|---|
| 733 | |
|---|
| 734 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_2 0x3769EC |
|---|
| 735 | |
|---|
| 736 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_3 0x3769F0 |
|---|
| 737 | |
|---|
| 738 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_4 0x3769F4 |
|---|
| 739 | |
|---|
| 740 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_5 0x3769F8 |
|---|
| 741 | |
|---|
| 742 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_6 0x3769FC |
|---|
| 743 | |
|---|
| 744 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_7 0x376A00 |
|---|
| 745 | |
|---|
| 746 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_8 0x376A04 |
|---|
| 747 | |
|---|
| 748 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_9 0x376A08 |
|---|
| 749 | |
|---|
| 750 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_10 0x376A0C |
|---|
| 751 | |
|---|
| 752 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_11 0x376A10 |
|---|
| 753 | |
|---|
| 754 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_12 0x376A14 |
|---|
| 755 | |
|---|
| 756 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_13 0x376A18 |
|---|
| 757 | |
|---|
| 758 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_14 0x376A1C |
|---|
| 759 | |
|---|
| 760 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_MASK_HIGH_AR_15 0x376A20 |
|---|
| 761 | |
|---|
| 762 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_HIT_AW 0x376A64 |
|---|
| 763 | |
|---|
| 764 | #define mmSIF_RTR_CTRL_7_RANGE_SEC_HIT_AR 0x376A68 |
|---|
| 765 | |
|---|
| 766 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_HIT_AW 0x376A6C |
|---|
| 767 | |
|---|
| 768 | #define mmSIF_RTR_CTRL_7_RANGE_PRIV_HIT_AR 0x376A70 |
|---|
| 769 | |
|---|
| 770 | #define mmSIF_RTR_CTRL_7_RGL_CFG 0x376B64 |
|---|
| 771 | |
|---|
| 772 | #define mmSIF_RTR_CTRL_7_RGL_SHIFT 0x376B68 |
|---|
| 773 | |
|---|
| 774 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_0 0x376B6C |
|---|
| 775 | |
|---|
| 776 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_1 0x376B70 |
|---|
| 777 | |
|---|
| 778 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_2 0x376B74 |
|---|
| 779 | |
|---|
| 780 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_3 0x376B78 |
|---|
| 781 | |
|---|
| 782 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_4 0x376B7C |
|---|
| 783 | |
|---|
| 784 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_5 0x376B80 |
|---|
| 785 | |
|---|
| 786 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_6 0x376B84 |
|---|
| 787 | |
|---|
| 788 | #define mmSIF_RTR_CTRL_7_RGL_EXPECTED_LAT_7 0x376B88 |
|---|
| 789 | |
|---|
| 790 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_0 0x376BAC |
|---|
| 791 | |
|---|
| 792 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_1 0x376BB0 |
|---|
| 793 | |
|---|
| 794 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_2 0x376BB4 |
|---|
| 795 | |
|---|
| 796 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_3 0x376BB8 |
|---|
| 797 | |
|---|
| 798 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_4 0x376BBC |
|---|
| 799 | |
|---|
| 800 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_5 0x376BC0 |
|---|
| 801 | |
|---|
| 802 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_6 0x376BC4 |
|---|
| 803 | |
|---|
| 804 | #define mmSIF_RTR_CTRL_7_RGL_TOKEN_7 0x376BC8 |
|---|
| 805 | |
|---|
| 806 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_0 0x376BEC |
|---|
| 807 | |
|---|
| 808 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_1 0x376BF0 |
|---|
| 809 | |
|---|
| 810 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_2 0x376BF4 |
|---|
| 811 | |
|---|
| 812 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_3 0x376BF8 |
|---|
| 813 | |
|---|
| 814 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_4 0x376BFC |
|---|
| 815 | |
|---|
| 816 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_5 0x376C00 |
|---|
| 817 | |
|---|
| 818 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_6 0x376C04 |
|---|
| 819 | |
|---|
| 820 | #define mmSIF_RTR_CTRL_7_RGL_BANK_ID_7 0x376C08 |
|---|
| 821 | |
|---|
| 822 | #define mmSIF_RTR_CTRL_7_RGL_WDT 0x376C2C |
|---|
| 823 | |
|---|
| 824 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH0_CTR_WRAP 0x376C30 |
|---|
| 825 | |
|---|
| 826 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH1_CTR_WRAP 0x376C34 |
|---|
| 827 | |
|---|
| 828 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH0_CTR_WRAP 0x376C38 |
|---|
| 829 | |
|---|
| 830 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH1_CTR_WRAP 0x376C3C |
|---|
| 831 | |
|---|
| 832 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH0_CTR_WRAP 0x376C40 |
|---|
| 833 | |
|---|
| 834 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH1_CTR_WRAP 0x376C44 |
|---|
| 835 | |
|---|
| 836 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH0_CTR_WRAP 0x376C48 |
|---|
| 837 | |
|---|
| 838 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH1_CTR_WRAP 0x376C4C |
|---|
| 839 | |
|---|
| 840 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH0_CTR_CNT 0x376C50 |
|---|
| 841 | |
|---|
| 842 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM0_CH1_CTR_CNT 0x376C54 |
|---|
| 843 | |
|---|
| 844 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH0_CTR_CNT 0x376C58 |
|---|
| 845 | |
|---|
| 846 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM1_CH1_CTR_CNT 0x376C5C |
|---|
| 847 | |
|---|
| 848 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH0_CTR_CNT 0x376C60 |
|---|
| 849 | |
|---|
| 850 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM2_CH1_CTR_CNT 0x376C64 |
|---|
| 851 | |
|---|
| 852 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH0_CTR_CNT 0x376C68 |
|---|
| 853 | |
|---|
| 854 | #define mmSIF_RTR_CTRL_7_E2E_AR_HBM3_CH1_CTR_CNT 0x376C6C |
|---|
| 855 | |
|---|
| 856 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH0_CTR_WRAP 0x376C70 |
|---|
| 857 | |
|---|
| 858 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH1_CTR_WRAP 0x376C74 |
|---|
| 859 | |
|---|
| 860 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH0_CTR_WRAP 0x376C78 |
|---|
| 861 | |
|---|
| 862 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH1_CTR_WRAP 0x376C7C |
|---|
| 863 | |
|---|
| 864 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH0_CTR_WRAP 0x376C80 |
|---|
| 865 | |
|---|
| 866 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH1_CTR_WRAP 0x376C84 |
|---|
| 867 | |
|---|
| 868 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH0_CTR_WRAP 0x376C88 |
|---|
| 869 | |
|---|
| 870 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH1_CTR_WRAP 0x376C8C |
|---|
| 871 | |
|---|
| 872 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH0_CTR_CNT 0x376C90 |
|---|
| 873 | |
|---|
| 874 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM0_CH1_CTR_CNT 0x376C94 |
|---|
| 875 | |
|---|
| 876 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH0_CTR_CNT 0x376C98 |
|---|
| 877 | |
|---|
| 878 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM1_CH1_CTR_CNT 0x376C9C |
|---|
| 879 | |
|---|
| 880 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH0_CTR_CNT 0x376CA0 |
|---|
| 881 | |
|---|
| 882 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM2_CH1_CTR_CNT 0x376CA4 |
|---|
| 883 | |
|---|
| 884 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH0_CTR_CNT 0x376CA8 |
|---|
| 885 | |
|---|
| 886 | #define mmSIF_RTR_CTRL_7_E2E_AW_HBM3_CH1_CTR_CNT 0x376CAC |
|---|
| 887 | |
|---|
| 888 | #define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_0 0x376CB0 |
|---|
| 889 | |
|---|
| 890 | #define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_1 0x376CB4 |
|---|
| 891 | |
|---|
| 892 | #define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_2 0x376CB8 |
|---|
| 893 | |
|---|
| 894 | #define mmSIF_RTR_CTRL_7_NL_HBM_PC_SEL_3 0x376CBC |
|---|
| 895 | |
|---|
| 896 | #endif /* ASIC_REG_SIF_RTR_CTRL_7_REGS_H_ */ |
|---|
| 897 | |
|---|
